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For a processor with primary and secondary caches, an instruction cache miss rate of 1%, a data cache miss rate of 5%, a instruction mix of 40% data accesses, a primary to secondary cache miss penalty of 10 cycles and a secondary cache to main memory miss penalty of 200 cycles and a secondary miss rate of 0.2%, what will be the contribution to total CPI from the cache misses (in decimal)

User Jeff Tsui
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1 Answer

7 votes

Answer:

The answer is "0.306".

Step-by-step explanation:

The Primary to Secondary Memory Instruction miss cycle


= I * 0.01 * 10 = 0.1 I

Data miss cycles
= I * 0.05 * 10 * 0.40 = 0.2 I

The Secondary to main Memory Instruction miss cycle
= I * 0.01 * 200 * 0.0002 = 0.004 I

Data miss cycles
= I * 0.05 * 200 * 0.0002 = 0.002 I

Total memory stall cycle
= ( 0.1 + 0.2 + 0.004 + 0.002 ) I =0.306 I

User Sean Cogan
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