Final answer:
To obtain a 17 Hz PWM signal from a 48 MHz timer clock, the minimum values for the prescaler (PS) and sub clock (SC) registers must be chosen based on the timer's available settings, with their product being as close to 2,823,529 as possible, without being lower, to achieve the desired frequency.
Step-by-step explanation:
To determine the minimum value of the fields PS (prescaler) and SC (sub clock) register to obtain a 17 Hz PWM signal with a 48 MHz timer clock, we need to calculate the required division factor. The formula to calculate the PWM frequency is:
F_{PWM} = F_{timer} / (PS * (SC + 1))
Where F_{PWM} is the desired PWM frequency, F_{timer} is the timer clock frequency, PS is the prescaler value, and SC is the sub clock register value that further divides the frequency after the prescaler.
To achieve a 17 Hz PWM signal:
17 Hz = 48,000,000 Hz / (PS * (SC + 1))
Rearranging the equation to solve for PS and SC, we find:
PS * (SC + 1) = 48,000,000 Hz / 17 Hz \approx 2,823,529.41
Thus, the product of PS and (SC + 1) should be approximately 2,823,529 to achieve the desired frequency. We would need to choose values of PS and SC from the available options in the timer configuration that, when multiplied, get as close as possible to this target value without going below it, as going lower would increase the frequency above 17 Hz. The minimum values for PS and SC would depend on the specific timer hardware and its available prescale and sub clock settings. However, these minimum values will be chosen to get a division factor as close to 2,823,529 while ensuring the result is a division factor equal to or higher than this target, to ensure the PWM frequency does not exceed 17 Hz.