Question

What would be the output frequency of a three stage [three flip flop] frequency division circuit with an input clock frequency of 80 kHz?

Question 1 options:

A) 100 kHz
B) 20 kHz
C) 15 kHz
D) 10 kHz
E) 5 kHz
F) 1 kHz

Answer 1

Option E

10 kHz

Step-by-step explanation:

`F_o=\frac {F_i}{2^(N)}`

Where
`F_o` is output frequency,
`F_i` is input frequency and N is the number of flip-floop

Substituting 80 kHz for
`F_i` and 3 for N we obtain

`F_o=\frac {80 kHz}{2^(3)}=10 kHz`

Therefore, the output frequency is equivalent to 10 kHz