Question

Design this Cascode amplifier with ideal current source load. Q1 and Q2 should be identical NMOS transistors. The negative output voltage swing should be as close to zero as possible, what is the value you achieve? All transistors must remain in saturation, of course.

Answer 1

The minimum permitted output voltage is 0.5V or 2V_{OV}

Step-by-step explanation:

The transistor is as indicated in the attached figure.

From the data

`\mu_nC_(ox)=350 \mu A/V\\V_(tn)=0.5V\\g_(m1)=2mA/V\\R_(out)=200k \Omega \\V_(An)'=7.5\\L_(min)=0.18 \mu m\\L_(min)<L<3.5L_(min)\\V_(OV)=0.25 V`

Now as both the transistors are identical as NMOS and thus

`g_(m1)=g_(m2)=g_m\\r_(o1)=r_(o2)=r_o`

Due to these properties

`R_(out)=g_(m)r_o^2\\r_o=\sqrt{(R_(out))/(g_(m))}\\r_o=\sqrt{(200*1000)/(2/1000)}\\r_o=10* 10^3 \Omega\\r_o=10k\Omega\\`

`I_D=(V_(OV)* g_m)/(2)\\I_D=(0.25* 0.002)/(2)\\I_D=250 \mu A`

Also

`L=(I_D* V_(OV))/(r_o)\\L=(250 \mu A * 10 k\Omega)/(5V/\mu)\\L=0.5 \mu m`

Now W/L is given as

`W/L=(g_m^2)/(2\mu_nC_(ox)I_D)\\W/L=((2/1000)^2)/(2*350*10^(-6)*250*10^(-6))\\W/L=160/7`

Now in order to obtain the maximum negative swing at the output, V_G is selected such that the voltage at the drain of Q_1 is the maximum permitted which is given as
`V_(OV)=0.25V`

`V_G=0.25+V_(OV)+V_t\\V_G=0.25+0.25+0.5\\V_G=1 V\\`

The minimum permitted output is

`V_O_(min)=V_G-V_t\\V_O_(min)=1-0.5\\V_O_(min)=0.5V\\V_O_(min)=2V_(OV)\\`

So the minimum permitted output voltage is 0.5V or 2V_{OV}