Part A: Binary 36-bit pattern to represent -1.5625 × 10-1 assuming the leftmost 12 bits as the exponent stored as a two's complement number, and the rightmost 24 bits are the fraction stored as a two's complement number.Because of the normalization, -1.5625 × 10-1 can be rewritten as - 0.15625 × 10°.Therefore, the binary equivalent of -0.15625 is as follows: First, take the absolute value of the number and convert it to binary:0.15625 x 2 = 0.3125 (0)0.3125 x 2 = 0.625 (0)0.625 x 2 = 1.25 (1)0.25 x 2 = 0.5 (0)0.5 x 2 = 1 (1)The above steps can be represented as a fraction:0.15625 × 2 = 0.3125 = 0.01001 × 2-20.3125 × 2 = 0.625 = 0.01001 × 2-10.625 × 2 = 1.25 = 0.101 × 2-11.25 × 2 = 0.5 = 0.1 × 2-10.5 × 2 = 1 = 0.1 × 2-1Thus, the 24-bit pattern of -0.15625 can be represented as 11111001 00000000 00000000. However, the two's complement representation of -0.15625 is required. Hence, the one's complement of 111110010000000000000000 is 000001011111111111111111. Thus, by adding 1 to it, we obtain the two's complement of 111110010000000000000000.000001011111111111111111 + 1 = 000001100000000000000000Therefore, the 36-bit binary pattern is as follows:1 bit for the sign, 12 bits for the exponent, and 24 bits for the fraction.11111111001 000000000000 110000000000000000000000Part B: Calculate the total number of bits required to implement a 32 KiB cache with two-word blocks. The cache has a capacity of 32 KiB with 2-word blocks of 64 bits each. Therefore, the cache contains:32768 bytes / 8 bytes = 4096 words in totalIn the address, the block offset is one bit (as the block size is 2 words) and the word offset is 3 bits (as each word is 8 bytes long and 8 = 2^3). The index is 11 bits, allowing a total of 2^11 = 2048 indices. The remaining bits (49 bits) will be used as a tag.Thus, the total number of bits required for each address is as follows:1 (block offset) + 3 (word offset) + 11 (index) + 49 (tag) = 64 bitsThe total number of bits required for the entire cache can be calculated by multiplying the number of addresses by the bits per address.4096 words * 2 blocks/word * 64 bits/block = 524288 bits = 65,536 Bytes = 64 KiBTherefore, a total of 64 KiB of memory is required to implement a 32 KiB cache with two-word blocks.