213k views
0 votes
*use d flip-flops and gates to design a binary counter with each of the following repeated binary sequences: (a) 0, 1, 2 (b) 0, 1, 2, 3, 4, 5

User Jamieann
by
7.6k points

1 Answer

3 votes

To design a binary counter with the repeated binary sequences (a) 0, 1, 2 and (b) 0, 1, 2, 3, 4, 5, we can use D flip-flops and logic gates as follows:

(a) Binary counter for sequence 0, 1, 2:

We need two D flip-flops to store the binary value of the counter. Let's call the flip-flops Q1 and Q0, where Q1 is the MSB (most significant bit) and Q0 is the LSB (least significant bit). We also need some logic gates to determine the next state of the counter based on the current state.

The next state of the counter can be determined by the following truth table:

Q1 Q0 next Q1 next Q0

0 0 0 1

0 1 1 0

1 0 1 1

1 1 0 0

We can implement this truth table using the following logic gates:

The D input of flip-flop Q0 is connected to the output of an XOR gate that has inputs Q1 and Q0.

The D input of flip-flop Q1 is connected to the output of an AND gate that has inputs Q1 and NOT(Q0).

The initial state of the counter is 0, 0. When the clock signal is applied, the counter will sequentially count through the binary values 0, 1, 2, and then repeat.

(b) Binary counter for sequence 0, 1, 2, 3, 4, 5:

We need three D flip-flops to store the binary value of the counter. Let's call the flip-flops Q2, Q1, and Q0, where Q2 is the MSB and Q0 is the LSB. We also need some logic gates to determine the next state of the counter based on the current state.

The next state of the counter can be determined by the following truth table:

Q2 Q1 Q0 next Q2 next Q1 next Q0

0 0 0 0 0 1

0 0 1 0 1 0

0 1 0 0 1 1

0 1 1 1 0 0

1 0 0 1 0 1

1 0 1 1 1 0

We can implement this truth table using the following logic gates:

The D input of flip-flop Q0 is connected to the output of an XOR gate that has inputs Q1 and Q0.

The D input of flip-flop Q1 is connected to the output of an XOR gate that has inputs Q2 and NOT(Q0).

The D input of flip-flop Q2 is connected to the output of an XOR gate that has inputs Q1 and NOT(Q1) (which is equivalent to an XNOR gate).

The initial state of the counter is 0, 0, 0. When the clock signal is applied, the counter will sequentially count through the binary values 0, 1, 2, 3, 4, 5, and then repeat.

User Endofzero
by
7.6k points