Question

We would like to establish the performance of a 5 stage Pipelined MIPS datapath using a custom multimedia benchmark with instruction execution frequencies given as follows:

Loads: 35%; Stores: 15%; Branch: 20%; Jumps: 5%; ALU Operations: 25%.
a) What is the CPI assuming no hazards occur:
b) Now compute the CPI assuming the following types of hazards occur
A 2 clock cycle penalty is incurred (one cycle stall) when branches are mispredicted. 25% of branches are miss-predicted.
Assume 30% of loads are immediately followed by an instruction that uses the result of the load.

Answer 1

Assuming no hazards, the CPI for a 5 stage Pipelined MIPS datapath is 1. With hazards, considering branch mispredictions and load-use stalls, the CPI increases to approximately 1.205.

Step-by-step explanation:

To answer the question about the performance of a 5 stage Pipelined MIPS datapath, we must consider both scenarios: one where no hazards occur and one where specific hazards cause penalties. If no hazards occur, we generally expect each stage of the pipeline to take one cycle, hence giving us a Cycles Per Instruction (CPI) of 1. However, this assumes a perfect condition which is not realistic in practical situations.

For part a), assuming no hazards occur, the CPI would be 1, because each instruction proceeds through the pipeline without delay.

For part b), when taking into account the specified hazards:

1. Branch misprediction penalty of 2 cycles occurs for 25% of the 20% branches. This results in an additional 0.25 * 0.20 * 2 = 0.10 cycles per instruction on average.
2. 30% load-use stall, where the following instruction depends on the load result, incurs a 1 cycle stall. This means an additional 0.30 * 0.35 * 1 = 0.105 cycles per instruction.

Therefore, the CPI with these hazards would be:

1 (base CPI) + 0.10 (branch misprediction penalty) + 0.105 (load-use stall) = 1.205 CPI.