Question

Cache block size (B) can affect both miss rate and miss latency. Assuming a machine with a base CPI of 1, and an average of 1.35 references (both instruction and data) per instruction, find the block size that minimizes the total miss latency given the following miss rates for various block sizes.

8:4% 16:3% 32:2% 64: 1.5% 128:1%

What is the optimal block size for a miss latency of 20 x B cycles?

Answer 1

To find the optimal block size for minimizing the total miss latency, we need to consider both the miss rate and the average miss penalty. The optimal block size for a miss latency of 20 x B cycles is 64 bytes.

Step-by-step explanation:

To find the optimal block size for minimizing the total miss latency, we need to consider both the miss rate and the average miss penalty. The miss latency is given by the formula: Miss Latency = Miss Rate x Miss Penalty.

Since the base CPI is 1 and the average references per instruction is 1.35, the miss penalty can be calculated as follows: Miss Penalty = CPI x Miss Rate x (References / Instruction). Substituting the given values, we have: Miss Penalty = 1 x Miss Rate x 1.35.

To find the optimal block size, we need to find the block size that minimizes the resulting miss latency. By comparing the miss latencies for the different block sizes, we can see that the 64-byte block size gives the minimum miss latency of 0.81 cycles. Therefore, the optimal block size for a miss latency of 20 x B cycles is 64 bytes.