Final answer:
Overflow occurs when the result exceeds the range that can be represented by a 4-bit integer in 2's complement binary addition.
Step-by-step explanation:
When adding two 4-bit 2's complement binary integers, overflow occurs when the result exceeds the range that can be represented by a 4-bit integer. In 2's complement representation, the leftmost bit represents the sign of the number (0 for positive, 1 for negative). Overflow happens if the sum of two positive numbers or the sum of two negative numbers results in a different sign, indicating that the result cannot be accurately represented with 4 bits.
For example, if we add two positive 4-bit numbers (e.g., 0110 + 0011), the sum is 10001, which cannot be represented with 4 bit sign.