Question

Answer the following questions for the single-cycle implementation (for your reference the datapath is in the last page):

a) The datapath works well for beq instruction (BRANCH =1 and ZERO =1 selects the branch address to be loaded into the PC). Modify this logic so that it will also accommodate the bne instruction in the datapath. (3)
b) For which instruction(s) RegDst multiplexor (appearing to the left of the register file) set to 0. (2)
c) There are two separate control line signals (MemRead and Memwrite) for data memory operations and MemtoReg for multiplexor control. Let's eliminate the MemtoReg and use MemRead to control the multiplexor. Will the modification work or not? Explain your reasons.

Answer 1

To accommodate the bne instruction in the single-cycle datapath, modify the logic to set BRANCH = 0 and ZERO = 0 when encountering bne.

Step-by-step explanation:

a) To accommodate the bne instruction in the datapath, the logic of the datapath can be modified as follows:

• BRANCH = 1 and ZERO = 1 still selects the branch address to be loaded into the PC when the beq instruction is encountered.
• For the bne instruction, BRANCH = 0 and ZERO = 0 should select the branch address to be loaded into the PC.

b) The RegDst multiplexor is set to 0 for the instructions that don't require the destination register to be the same as the rt field of the instruction. Examples of such instructions are add, sub, and, or, slt, etc.

c) Eliminating the MemtoReg control line signal and using MemRead to control the multiplexer will not work. The MemtoReg control line is responsible for selecting whether the value to be written back to the register file comes from the data memory (MemtoReg = 1) or from the ALU (MemtoReg = 0). Using only MemRead to control the multiplexer would not provide the necessary information for the desired selection.