Final answer:
The missing (W/L) values can be determined by taking into account the provided transconductance parameters Kn and Kp, supply voltage VDD, and a maximum drain current IDmax to balance the propagation delays of NMOS and PMOS transistors.
Step-by-step explanation:
To determine the missing (W/L) values that ensure the same propagation delay for all combinations of inputs in a CMOS circuit, we first need to review the relevant parameters defining the delay of a MOSFET transistor, which are primarily influenced by its dimensions (width W and length L), carrier mobility, and threshold voltage. Given Kn = 100μA/V² for NMOS and Kp = 50μA/V² for PMOS, with a supply voltage VDD = 5V, and a maximum drain current IDmax = 250μA, we can establish the (W/L) ratios that will achieve matching delays.
To balance the propagation delay between NMOS and PMOS transistors, the ratio of their transconductance parameters (K) should reflect the inversely proportional relationship due to differences in carrier mobility between electrons and holes. The (W/L) ratio must subsequently be adjusted to compensate for this discrepancy. Without the specific circuit diagram or further information about the loading conditions, we cannot provide precise (W/L) values, but the concept required is to match the effective resistance and hence the RC time constants for NMOS and PMOS transistors for equal rise and fall times.