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3 votes
Hour block

I constructed the seconds and minutes and they worked fine with a divide by 10 followed by divide by 6. But when it comes to the divide by 12, the first digit BCD does the 12 counts and reset but the second digit continues to add up instead of resetting from 0 to 1 for 12H or from 0 to 24 for 24H.Sorry I don't know how to upload my design from multisim. I used 2 divide by 12 counters.

This is the original question for this project.

The student will construct a digital alarm clock using basic logic components. The clock will consist of a timer circuit, a divide by 6 counter, a decade counter, and a display module. The alarm will be set by switches in BCD notation and the alarm itself will be instrumented by attaching a light which will illuminate when the alarm time and the clock time match.

The circuit will use the following components:

Timer (555)

7 segment display

User Ninita
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7.9k points

1 Answer

5 votes

Final answer:

The student is facing an issue with a digital alarm clock circuit, specifically with correctly resetting hour counters in a 24-hour format. To resolve this, the counters must be correctly designed to increment and reset at the appropriate times, which may involve using a combination of logic gates and synchronization mechanisms.

Step-by-step explanation:

The student is working on constructing a digital alarm clock using basic logic components, particularly focusing on creating a 24-hour timekeeping mechanism. The question describes a problem with the hour counting circuit in a digital clock. Specifically, they are using counter circuits that divide by 6 and divide by 12 to count minutes and hours, but they have encountered an issue with the hour counter, which does not reset correctly when changing from 12 to 1 for a 12-hour clock or 0 to 1 for a 24-hour clock. When constructing such counters using flip-flops or other digital logic components, it is crucial to ensure that the counter correctly transitions from the maximum hour back to the start. In the case of a 24-hour clock, this would usually involve using a modulo-24 counter configuration.

For the second digit of the hours to correctly display time in a 24-hour format, the counter should only increment after the first digit completes a cycle through 0 to 2 and then resets. This can be implemented using a combination of AND gates and a reset signal that triggers when the count reaches 24, resetting both the first and second digits back to 0. If the second digit continues to add up beyond the designed limit, it suggests there may be an error in the logic circuit that controls the reset operation, or that the counters are not properly synchronized.

User Sergei Sirik
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8.1k points