Question

Classify each of the below situations as either a structural hazard, control hazard, or a data hazard:

a. The memory shared by instruction fetches and data accesses in a von Neumann memory architecture. This is ___.
b. A conditional branch instruction in a RISC processor. This is a __ .
c. An integer multiplier that takes two cycles to complete when all other arithmetic operations in a processor take one cycle. Assume that there are sufficient register read and write ports to support all the necessary reads and writes per cycle. This is a ___.

Answer 1

a. structural hazard

b. control hazard

c. data hazard

Step-by-step explanation:

In Neumann memory architecture the data and the instructions are being stored at one place and are processed through same pipeline. Hence, at times the two can ask for same resource, and hence the resource or the structural hazard occurs in first case.

When the hazard is due to branching, it is the branch hazard or the control hazard, and as in second case.

And when data is being modified in different stages, it is the data hazard, and as in third case,