Question

Consider the operation of a machine with the data path given below. Suppose that loading the ALU input registers takes 5 nsec, running the ALU takes 10 nsec, and storing the result back in the register scratchpad takes 5 nsec. What’s the maximum number of MIPS this machine is capable of with pipelining with the three execution stages?

Answer 1

The load instructions in the ALU input registers take the 5 nsec, and tuns the ALU and this takes the 10 nsec and thus stores the result back into the scratchpad registers and this takes 5 nsec. The data path cycle in it is 20 nsec.

The total time is 20 nsec for one cycle.

To calcualte the MIPS, divide one second with 20 nsec.

Millions of instructions per second (MIPS) = (1*10^9 nsec)/20 nsec = 50,000,000 nsec

Therefore, the maximum number of MIPS this machine is capable of in the absence of pipelining is 50 MIPS.

Step-by-step explanation: