Question

A delay between the time an address arrives in a bus to when the memory is ready to return the data is known as _____ latency.

Answer 1

Column Access Strobe (CAS) latency

Step-by-step explanation:

Column Access Strobe (CAS) latency is the time limit between the READ command and the time when information is accessible.

The interval is defined in nanoseconds in asynchronous DRAM(Dynamic random-access memory).The interval is defined in clock cycles in synchronous DRAM.

Since latency depends on a number of clock ticks rather than absolute time, if the clock rate differs, the actual time for a SDRAM (Synchronous dynamic random-access memory) module to respond to a CAS event may vary.