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For a direct-mapped cache design with a 64-bit address, the following bits of the address are used to access the cache.

Tag. Index. Offset
63–10 9–5 4–0

What is the cache block size (in words)?

User Parapote
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Final answer:

The cache block size in a direct-mapped cache design with a 64-bit address and offset bits 4–0 is 32 words, as 5 bits are used to represent the offset within a block.

Step-by-step explanation:

The correct answer is that the cache block size is 32 words. In a direct-mapped cache design, the part of the address labeled as the offset specifies the word within a cache block, which means the number of bits in the offset determines the size of the cache block. Given the offset bits are 4–0, there are 5 bits used to reference the offset within a block. These 5 bits can represent 25 or 32 possible offsets, meaning each block holds 32 words.

In a direct-mapped cache design, the address is divided into three parts: tag, index, and offset. In this case, the address is 64-bits long.

The offset field determines the size of each cache block. Since the offset is 5 bits long (bits 4-0), there are 2^5 = 32 possible offsets. Each offset corresponds to a word within a cache block. Therefore, the cache block size is 32 words.

User MPicazo
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