Question

The Arithmetic Logic Unit is a combinational circuit that makes up an important part of the CPU. As discussed earlier, we learned that a simple ALU consists of two major subciruits: an arithmetic unit (AU) and a logic unit (LU). We have previously created the arithmetic unit; in today's lab, we will build the logic unit and combine the two subcircuits together to create the final ALU circuit. The Logic Unit (LU): The logic unit of the RSC must be able to perform the following logic operations for two 32-bit registers called A and B: A AND B, A OR B, Right Arithmetic Shift (RAS) on A, and NOT A. Since there are four operations to be performed, we need a code, S1 and S0 again, to specify which operation is to be performed. Your logic unit should operate as follows: S1 S0 Output 00 F=AAANDB 0 1 F=AORB 10F=RASA 11F= NOT A A note on the right arithmetic shift: Our operation will shift only one bit to the right. Procedure The Logic Unit: 1. Open Logisim and open your RSC. circ file. 2. Open the Logic_U circuit and add the following 1/O : - Two 32-bit inputs labeled A and B - Two 1-bit inputs labeled $0 and $1 - One 32-bit output labeled Logic_Out 3. Add combinational gates and circuits as needed to make the circuit behave as described above. 4. Test your circuit with the following values: A=ABCD1234 and B=06AE18AD. S1 SO Output should be: 00028C1024 01 AFEF1ABD 10 D5E6891A 115432EDCB.

Answer 1

The question is about creating and testing a Logic Unit in Logisim for an ALU with four operations selected by a two-bit code: AND, OR, Right Arithmetic Shift, and NOT. Logic gates and shift registers are implemented to perform these operations, and specific test values are provided to ensure the logic unit works correctly.

Step-by-step explanation:

The student's task involves building a Logic Unit (LU) as part of an Arithmetic Logic Unit (ALU) for a CPU using Logisim, which is a hardware simulation tool. The Logic Unit should be able to perform four operations on two 32-bit registers A and B, using a two-bit selector (S1 S0). The operations are: A AND B, A OR B, Right Arithmetic Shift (RAS) on A, and NOT A. These operations are selected based on the value of the two selector bits, where '00' is for AND, '01' for OR, '10' for RAS, and '11' for NOT A.

For the logic unit, combinational logic gates like AND gate, OR gate, and inverters are to be used along with a multiplexer to select the output based on the selector inputs S1 and S0. The Right Arithmetic Shift operation requires a shift register that can handle sign extension for the shifted bits if the value is negative.

After implementing the required gates and shift register, the student should test their logic unit with the provided input values of A (ABCD1234) and B (06AE18AD) to ensure that the correct outputs are produced for different selector inputs. The expected outputs for the tests are provided in the question for verification.