Final answer:
The project involves designing a counter using a system function from LPM library and Verilog. The counter will count up to 99 seconds and reset. The maximum frequency depends on various factors.
Step-by-step explanation:
The project involves designing a counter that counts seconds up to 99 using a ready-made system function from the LPM library and Verilog. The counter will reset and continue counting after reaching 99. The code must be written in Verilog and compiled for functional simulation.
The counter status will be displayed using HEX1 and HEX2. The project also requires documenting the design and simulation to prove its functionality.
The maximum frequency at which the counter can work depends on various factors such as the complexity of the design, the capability of the hardware, and the clock frequency being used.